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Jens Spinner
Jens Spinner
HTWG Konstanz
Verified email at htwg-konstanz.de
Title
Cited by
Cited by
Year
A configurable Bose–Chaudhuri–Hocquenghem codec architecture for flash controller applications
J Freudenberger, J Spinner
Journal of Circuits, Systems, and Computers 23 (02), 1450019, 2014
382014
A soft input decoding algorithm for generalized concatenated codes
J Spinner, J Freudenberger, S Shavgulidze
IEEE Transactions on Communications 64 (9), 3585-3595, 2016
342016
Decoder architecture for generalised concatenated codes
J Spinner, J Freudenberger
IET Circuits, Devices & Systems 9 (5), 328-335, 2015
272015
Construction of high-rate generalized concatenated codes for applications in non-volatile flash memories
J Spinner, M Rajab, J Freudenberger
2016 IEEE 8th International Memory Workshop (IMW), 1-4, 2016
182016
Concatenated code constructions for error correction in non-volatile memories
J Freudenberger, U Kaiser, J Spinner
2012 International Symposium on Signals, Systems, and Electronics (ISSSE), 1-6, 2012
172012
Soft input decoder for high‐rate generalised concatenated codes
J Spinner, D Rohweder, J Freudenberger
IET Circuits, Devices & Systems 12 (4), 432-438, 2018
142018
Design and implementation of a pipelined decoder for generalized concatenated codes format
J Spinner, J Freudenberger
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 1-6, 2014
142014
Generalized concatenated codes for correcting two-dimensional clusters of errors and independent errors
J Freudenberger, J Spinner, S Shavgulidze
2014 IEEE 11th International Multi-Conference on Systems, Signals & Devices …, 2014
122014
Channel coding for flash memories
J Spinner
72019
A decoder with soft decoding capability for high-rate generalized concatenated codes with applications in non-volatile flash memories
J Spinner, J Freudenberger
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design …, 2017
62017
Soft input decoding of generalized concatenated codes using a stack decoding algorithm
J Spinner, J Freudenberger
Proceedings of 2nd BW-CAR Symposium on Information and Communication Systems …, 2015
42015
Set partitioning of Gaussian integer constellations and its application to two‐dimensional interleaving
J Freudenberger, J Spinner, S Shavgulidze
IET Communications 8 (8), 1336-1346, 2014
42014
A BCH decoding architecture with mixed parallelization degrees for flash controller applications
J Spinner, J Freudenberger, C Baumhof, A Mehnert, R Willems
2013 IEEE International SOC Conference, 116-121, 2013
42013
Mixed serial/parallel hardware implementation of the Berlekamp-Massey algorithm for BCH decoding in Flash controller applications
J Freudenberger, J Spinner
2012 International Symposium on Signals, Systems, and Electronics (ISSSE), 1-5, 2012
42012
Method and device for error correction coding based on high-rate generalized concatenated codes
J Freudenberger, C Baumhof, J Spinner
US Patent 10,320,421, 2019
32019
An efficient hardware implementation of sequential stack decoding of binary block codes
J Freudenberger, T Wegmann, J Spinner
2015 IEEE 5th International Conference on Consumer Electronics-Berlin (ICCE …, 2015
32015
Sequential Decoding of Binary Block Codes Based on Supercode Trellises
J Spinner, J Freudenberger, S Shavgulidze
Baden-Württemberg Center of Applied Research Symposium on Information and …, 2014
32014
Set partitioning of Gaussian integer constellations and its application to two-dimensional interleaver design
J Freudenberger, J Spinner, S Shavgulidze
2014 IEEE 11th International Multi-Conference on Systems, Signals & Devices …, 2014
32014
Semi-automatic source code generation for the hardware-implementation of a parallelizable and configurable error correction unit
J Spinner, J Freudenberger
PRIME 2012; 8th Conference on Ph. D. Research in Microelectronics …, 2012
22012
Method and decoder for soft input decoding of generalized concatenated codes
J Freudenberger, J Spinner, C Baumhof
US Patent 10,230,403, 2019
12019
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